Big Tech pushes envelope with Generative-AI Chip designs using Synopsys.ai Copilot

Artificial intelligence has progressively integrated into various segments of Synopsys’ EDA tool suite over recent years. It all began in 2021 with DSO.ai, aimed at expediting and refining the place-and-route phase of semiconductor design. This advancement expanded into Synopsys’ comprehensive toolchain, known as the Synopsys.ai suite, covering the entire chip development workflow. Despite its series of achievements, Synopsys isn’t halting its innovation. Recently, a strategic collaboration with Microsoft was unveiled, introducing the Synopsys.ai Copilot, a context-aware generative AI tool supporting human design teams via conversational intelligence using natural language.

Powered by OpenAI technology on Microsoft’s Azure cloud infrastructure, Synopsys.ai Copilot aims to alleviate much of the laborious work involved in RTL generation and verification, akin to ChatGPT’s impact in various industries. Chip designers can seamlessly interact with the Copilot using plain English, seeking insights, documentation creation, or information on diverse criteria. Synopsys disclosed collaborations with AMD, Intel, and Microsoft involving the Synopsys.ai Copilot on different designs.

The Copilot’s generative AI unlocks several new capabilities, offering engineers guidance on design tools, EDA workflows, and swift result analysis. It expedites RTL development, formal verification, UVM test benches, and layout design. Moreover, it facilitates end-to-end workflow creation using natural language across the Synopsys.ai suite.

Shankar Krishnamoorthy, GM of Synopsys EDA Group, emphasized, “Synopsys.ai suite expands to include generative AI capabilities, addressing engineering productivity during talent shortages.”

Synopsys.ai Copilot, trained on extensive design-related data spanning around 30 years, adapts to new skills and gleans insights from the designer’s environment. It presents visual data, synthesizes responses, and enables contextual queries within Synopsys’ tools, providing prompt solutions. For instance, in a scenario where timing violations in a chip surface, the Copilot guides the designer through the correct workflow to resolve issues. Videos showcasing other examples are available on the Synopsys website, offering insight into Synopsys.ai Copilot’s role in the design process.

The rollout strategy for Synopsys.ai Copilot is still in the works but aims to be accessible to customers leveraging Synopsys’ EDA suite on-premises or in the cloud. These AI-infused EDA tools serve multiple purposes, enhancing engineering team efficiency, elevating chip design quality, and addressing talent shortages in custom chip designs. Conversations with Synopsys and partners underscore the tools’ effectiveness, highlighting Synopsys’ impressive pace in integrating pervasive AI into its tool suite.

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